1. Technical Field
The present invention relates generally to electrical computers and digital processing systems, and more particularly to subject matter which controls the structure joining the processing elements by partitioning the array into groups of processing elements.
2. Background Art
Writing software programs oftentimes requires making tradeoffs between program size and program functionality. When a program is written to be compact or short it generally is not overly complex, and can be executed with speed and without requiring a lot of processor and memory resources. Conversely, longer programs can perform more tasks and more complex tasks but they typically require greater amounts of resources, particularly including processor registers, working memory, program storage memory, and processor cycles to work with these as well as to execute the entire underlying program.
A conventional approach to writing software for a target machine is to write in the native machine language and load the program into the local random access memory (RAM) of the target machine. In this approach the size of the program that can be stored in the local RAM is limited by the size of the local RAM. However, it is impossible to have a fixed RAM size that will always be big enough.
An alternative approach is to create a virtual machine in the limited local random access memory (RAM) that can execute virtual instructions read from external memory. A virtual machine like eForth performs this task but is limited to executing a certain number of subroutines over and over, sometimes called primitives. Also, eForth is slowed by the need to maintain stacks in external memory.
There exists a need to execute native machine code that may not always fit in the local RAM. Furthermore, the process of fetching the native code by storing it externally should not unduly delay the execution of the native code.